data: publish complete Calculet NPU research archive

source/repositories-complete/systemc-exact/systemc/examples/tlm/lt/include/initiator_top.h

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+/*****************************************************************************
+
+  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+  more contributor license agreements.  See the NOTICE file distributed
+  with this work for additional information regarding copyright ownership.
+  Accellera licenses this file to you under the Apache License, Version 2.0
+  (the "License"); you may not use this file except in compliance with the
+  License.  You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+  implied.  See the License for the specific language governing
+  permissions and limitations under the License.
+
+ *****************************************************************************/
+
+//==============================================================================
+/// @file initiator_top.h
+//
+/// @brief Top for Initiator and traffic generator combination
+//
+//==============================================================================
+//
+//  Original Authors:
+//    Jack Donovan, ESLX
+//    Charles Wilson, ESLX
+//
+//==============================================================================
+
+#ifndef __INITIATOR_TOP_H__
+#define __INITIATOR_TOP_H__
+
+#include "tlm.h"                                // TLM headers
+#include "lt_initiator.h"                       // LT/blocking initiator
+#include "traffic_generator.h"                  // traffic generator
+
+class initiator_top                          		       
+  : public sc_core::sc_module    
+  , virtual public tlm::tlm_bw_transport_if<>  // inherit from TLM 2.0 interface
+{
+
+public:
+//Member Methods  ==============================================================  	  
+//==============================================================================
+///  @fn initiator_top::initiator_top
+//	    
+///  @brief initiator_top constructor
+//	    
+///  @details
+///    Initiator top module contains a traffic generator and an example 
+///    unique initiator module
+//
+//============================================================================== 
+  initiator_top 	                                   
+  ( sc_core::sc_module_name name                 ///< module name
+  , const unsigned int  ID                       ///< initiator ID
+  , sc_dt::uint64       base_address_1           ///< first base address
+  , sc_dt::uint64       base_address_2           ///< second base address
+  );
+
+/// Required and unused virtual methods required for hierarchical connectivity
+  void                                                                                          
+  invalidate_direct_mem_ptr                                      
+  ( sc_dt::uint64      start_range                        
+  , sc_dt::uint64      end_range                 
+  );
+  
+  tlm::tlm_sync_enum       
+  nb_transport_bw                                                          
+  ( tlm::tlm_generic_payload  &payload
+  , tlm::tlm_phase            &phase
+  , sc_core::sc_time          &delta
+  );
+  
+public:
+  
+//Member Variables/Objects  ====================================================
+  
+  tlm::tlm_initiator_socket< > top_initiator_socket;
+
+private:
+  
+  typedef tlm::tlm_generic_payload  *gp_ptr;   ///< Generic Payload pointer
+  
+  sc_core::sc_fifo <gp_ptr>  m_request_fifo;   ///< request SC FIFO
+  sc_core::sc_fifo <gp_ptr>  m_response_fifo;  ///< response SC FIFO
+  
+  const unsigned int         m_ID;             ///< initiator ID
+    
+  lt_initiator               m_initiator;      ///< TLM initiator instance
+  traffic_generator          m_traffic_gen;    ///< traffic generator instance
+
+};
+
+#endif /* __INITIATOR_TOP_H__ */

source/repositories-complete/systemc-exact/systemc/examples/tlm/lt/include/lt_top.h

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+/*****************************************************************************
+
+  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+  more contributor license agreements.  See the NOTICE file distributed
+  with this work for additional information regarding copyright ownership.
+  Accellera licenses this file to you under the Apache License, Version 2.0
+  (the "License"); you may not use this file except in compliance with the
+  License.  You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+  implied.  See the License for the specific language governing
+  permissions and limitations under the License.
+
+ *****************************************************************************/
+ 
+//==============================================================================
+///  @file lt_top.h
+// 
+///  @brief Top level interconnect and instantiation for lt example 
+//
+//==============================================================================
+//
+//  Original Authors:
+//    Jack Donovan, ESLX
+//    Charles Wilson, ESLX
+//    Anna Keist, ESLX
+//
+//==============================================================================
+
+#ifndef __LT_TOP_H__
+#define __LT_TOP_H__
+
+#include "tlm.h"                              // TLM header
+#include "lt_target.h"                        // lt memory target
+#include "at_target_1_phase.h"                // at and lt memory target
+#include "initiator_top.h"                    // processor abstraction initiator
+#include "models/SimpleBusLT.h"               // Bus/Router Implementation
+
+/// Top wrapper Module
+class lt_top                                  // Declare SC_MODULE
+: public sc_core::sc_module                   
+{
+public:
+	
+/// Constructor	
+  lt_top ( sc_core::sc_module_name name); 
+
+//Member Variables  ===========================================================
+  private:
+  SimpleBusLT<2, 2>       m_bus;                  ///< simple bus
+  at_target_1_phase       m_at_and_lt_target_1;   ///< combined blocking/non-blocking
+  lt_target               m_lt_target_2;          ///< blocking with convenienece socket
+  initiator_top           m_initiator_1;          ///< instance 1 initiator
+  initiator_top           m_initiator_2;          ///< instance 2 initiator
+};
+#endif /* __LT_TOP_H__ */