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cogito
2026-08-02 14:57:11 +08:00
parent b5c4fbffab
commit 98e6cadcb6
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source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/CMakeLists.txt
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###############################################################################
#
# Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
# more contributor license agreements. See the NOTICE file distributed
# with this work for additional information regarding copyright ownership.
# Accellera licenses this file to you under the Apache License, Version 2.0
# (the "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
# implied. See the License for the specific language governing
# permissions and limitations under the License.
#
###############################################################################
###############################################################################
#
# examples/tlm/at_ooo/CMakeLists.txt --
# CMake script to configure the SystemC sources and to generate native
# Makefiles and project workspaces for your compiler environment.
#
# Original Author: Torsten Maehne, Université Pierre et Marie Curie, Paris,
# 2013-06-11
#
###############################################################################
###############################################################################
#
# MODIFICATION LOG - modifiers, enter your name, affiliation, date and
# changes you are making here.
#
# Name, Affiliation, Date:
# Description of Modification:
#
###############################################################################
add_executable (at_ooo src/at_ooo.cpp
include/at_ooo_top.h
src/at_ooo_top.cpp
include/initiator_top.h
src/initiator_top.cpp
../common/include/at_target_2_phase.h
../common/src/at_target_2_phase.cpp
include/at_target_ooo_2_phase.h
src/at_target_ooo_2_phase.cpp
../common/include/memory.h
../common/src/memory.cpp
../common/include/reporting.h
../common/src/report.cpp
../common/include/select_initiator.h
../common/src/select_initiator.cpp
../common/include/traffic_generator.h
../common/src/traffic_generator.cpp)
target_include_directories (at_ooo PRIVATE include ../common/include)
target_link_libraries (at_ooo SystemC::systemc)
configure_and_add_test (at_ooo)
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/build-msvc/Makefile
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!include <..\..\..\build-msvc\Makefile.config>
PROJECT = at_ooo
OBJS = \
$(OUTDIR)\$(PROJECT).obj \
$(OUTDIR)\$(PROJECT)_top.obj \
$(OUTDIR)\initiator_top.obj \
\
$(OUTDIR)\at_target_2_phase.obj \
$(OUTDIR)\at_target_ooo_2_phase.obj \
$(OUTDIR)\memory.obj \
$(OUTDIR)\report.obj \
$(OUTDIR)\select_initiator.obj \
$(OUTDIR)\traffic_generator.obj
!include <..\..\..\build-msvc\Makefile.rules>
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/build-msvc/at_ooo.sln
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Microsoft Visual Studio Solution File, Format Version 11.00
# Visual Studio 2010
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "at_ooo", "at_ooo.vcxproj", "{085992EF-F59F-44A9-8971-D23785FB81D9}"
EndProject
Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution
Debug|Win32 = Debug|Win32
Debug|x64 = Debug|x64
Release|Win32 = Release|Win32
Release|x64 = Release|x64
EndGlobalSection
GlobalSection(ProjectConfigurationPlatforms) = postSolution
{085992EF-F59F-44A9-8971-D23785FB81D9}.Debug|Win32.ActiveCfg = Debug|Win32
{085992EF-F59F-44A9-8971-D23785FB81D9}.Debug|Win32.Build.0 = Debug|Win32
{085992EF-F59F-44A9-8971-D23785FB81D9}.Debug|x64.ActiveCfg = Debug|x64
{085992EF-F59F-44A9-8971-D23785FB81D9}.Debug|x64.Build.0 = Debug|x64
{085992EF-F59F-44A9-8971-D23785FB81D9}.Release|Win32.ActiveCfg = Release|Win32
{085992EF-F59F-44A9-8971-D23785FB81D9}.Release|Win32.Build.0 = Release|Win32
{085992EF-F59F-44A9-8971-D23785FB81D9}.Release|x64.ActiveCfg = Release|x64
{085992EF-F59F-44A9-8971-D23785FB81D9}.Release|x64.Build.0 = Release|x64
EndGlobalSection
GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE
EndGlobalSection
EndGlobal
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/build-msvc/at_ooo.vcxproj
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<?xml version="1.0" encoding="utf-8"?>
<Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
<ItemGroup Label="ProjectConfigurations">
<ProjectConfiguration Include="Debug|Win32">
<Configuration>Debug</Configuration>
<Platform>Win32</Platform>
</ProjectConfiguration>
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<Configuration>Release</Configuration>
<Platform>Win32</Platform>
</ProjectConfiguration>
<ProjectConfiguration Include="Release|x64">
<Configuration>Release</Configuration>
<Platform>x64</Platform>
</ProjectConfiguration>
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<PropertyGroup Label="Globals">
<ProjectGuid>{085992EF-F59F-44A9-8971-D23785FB81D9}</ProjectGuid>
<RootNamespace>winbuild</RootNamespace>
<Keyword>Win32Proj</Keyword>
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<Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
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<ConfigurationType>Application</ConfigurationType>
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<ClCompile Include="..\src\at_ooo.cpp" />
<ClCompile Include="..\src\at_ooo_top.cpp" />
<ClCompile Include="..\..\common\src\at_target_2_phase.cpp" />
<ClCompile Include="..\src\at_target_ooo_2_phase.cpp" />
<ClCompile Include="..\src\initiator_top.cpp" />
<ClCompile Include="..\..\common\src\memory.cpp" />
<ClCompile Include="..\..\common\src\report.cpp" />
<ClCompile Include="..\..\common\src\select_initiator.cpp" />
<ClCompile Include="..\..\common\src\traffic_generator.cpp" />
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<ClInclude Include="..\include\initiator_top.h" />
<ClInclude Include="..\..\common\include\memory.h" />
<ClInclude Include="..\..\common\include\reporting.h" />
<ClInclude Include="..\..\common\include\select_initiator.h" />
<ClInclude Include="..\..\common\include\models\SimpleBusAT.h" />
<ClInclude Include="..\..\common\include\traffic_generator.h" />
</ItemGroup>
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
<ImportGroup Label="ExtensionTargets">
</ImportGroup>
</Project>
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/build-unix/Makefile
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include ../../../build-unix/Makefile.config
PROJECT = at_ooo
VPATH = \
../src \
../../common/src
INCDIR = \
-I../include \
-I../../common/include
OBJS = \
$(PROJECT).o \
$(PROJECT)_top.o \
initiator_top.o \
\
at_target_2_phase.o \
at_target_ooo_2_phase.o \
memory.o \
report.o \
select_initiator.o \
traffic_generator.o
include ../../../build-unix/Makefile.rules
# DO NOT DELETE
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/docs/at_ooo_example.pdf
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source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/docs/at_ooo_example.ppt
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source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/include/at_ooo_top.h
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/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
//=====================================================================
/// @file example_system_top.h
/// @brief This class instantiates components that compose TLM2
/// example system that demonstrates Out of Order Execution of
/// transactions
//=====================================================================
// Original Authors:
// Anna Keist, ESLX
// Bill Bunton, ESLX
// Jack Donovan, ESLX
//=====================================================================
#ifndef __EXAMPLE_SYSTEM_TOP_H__
#define __EXAMPLE_SYSTEM_TOP_H__
#include "tlm.h" // TLM header
#include "at_target_2_phase.h" // at memory target
#include "at_target_ooo_2_phase.h" // memory target
#include "initiator_top.h" // processor abstraction initiator
#include "models/SimpleBusAT.h" // Bus/Router Implementation
/// Top wrapper Module
class example_system_top
: public sc_core::sc_module // SC base class
{
public:
/// Constructor
example_system_top
( sc_core::sc_module_name name);
//Member Variables ===========================================================
private:
SimpleBusAT<2, 2> m_bus; ///< simple bus
at_target_2_phase m_at_target_2_phase_1; ///< instance 1 target
at_target_ooo_2_phase m_at_target_ooo_2_phase_1; ///< instance 2 target
initiator_top m_initiator_1; ///< instance 1 initiator
initiator_top m_initiator_2; ///< instance 2 initiator
};
#endif /* __EXAMPLE_SYSTEM_TOP_H__ */
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/include/at_target_ooo_2_phase.h
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/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
//=====================================================================
/// @file at_target_ooo_2_phase.h
//
/// @brief A 2 phase target that has been created to force out of order
/// processing of transactions
//
//=====================================================================
// Original Authors:
// Bill Bunton, ESLX
// Charles Wilson, ESLX
// Jack Donovan, ESLX
//=====================================================================
#ifndef __AT_TARGET_OOO_2_PHASE_H__
#define __AT_TARGET_OOO_2_PHASE_H__
#include "tlm.h" // TLM headers
#include "tlm_utils/peq_with_get.h" // Payload event queue FIFO
#include "memory.h"
class at_target_ooo_2_phase /// at_target_ooo_2_phase
: public sc_core::sc_module /// inherit from SC module base clase
, virtual public tlm::tlm_fw_transport_if<> /// inherit from TLM "forward interface"
{
// Member Methods =====================================================
public:
//=====================================================================
/// @fn at_initiator_1_phase
///
/// @brief Constructor for Single Phase AT target
///
/// @details
/// Generic Single Phase target used in several examples.
/// Constructor offers several parameters for customization
///
//=====================================================================
at_target_ooo_2_phase
( sc_core::sc_module_name module_name ///< SC module name
, const unsigned int ID ///< target ID
, const char *memory_socket ///< socket name
, sc_dt::uint64 memory_size ///< memory size (bytes)
, unsigned int memory_width ///< memory width (bytes)
, const sc_core::sc_time accept_delay ///< accept delay (SC_TIME, SC_NS)
, const sc_core::sc_time read_response_delay ///< read response delay (SC_TIME, SC_NS)
, const sc_core::sc_time write_response_delay ///< write response delay (SC_TIME, SC_NS)
);
//=====================================================================
/// @brief Implementation of call from Initiator.
//
/// @details
/// This is the ultimate destination of the nb_transport_fw call from
/// the initiator after being routed trough a Bus
//
//=====================================================================
tlm::tlm_sync_enum // sync status
nb_transport_fw
( tlm::tlm_generic_payload &gp ///< generic payoad pointer
, tlm::tlm_phase &phase ///< transaction phase
, sc_core::sc_time &delay_time ///< time taken for transport
);
//=====================================================================
/// @fn at_target_ooo_2_phase::begin_response_method
///
/// @brief Response Processing
///
/// @details
/// This routine takes transaction responses from the m_response_PEQ.
/// It contains the state machine to manage the communication path
/// back to the initiator. This method is registered as an SC_METHOD
/// with the SystemC kernal and is sensitive to m_response_PEQ.get_event()
//=====================================================================
void
begin_response_method
( void
);
private:
/// helper function for printing memory transactions
void
print_memory_transaction_helper
( const int &ID
, std::ostringstream &partial_msg
, tlm::tlm_generic_payload &trans
);
//==============================================================================
// Methods not Implemented for this Example
/// b_transport() - Blocking Transport
void // returns nothing
b_transport
( tlm::tlm_generic_payload &payload // ref to payload
, sc_core::sc_time &delay_time // delay time
);
/// Not implemented for this example but required by interface
bool // success / failure
get_direct_mem_ptr
( tlm::tlm_generic_payload &payload, // address + extensions
tlm::tlm_dmi &dmi_data // DMI data
);
/// Not implemented for this example but required by interface
unsigned int // result
transport_dbg
( tlm::tlm_generic_payload &payload // debug payload
);
// Member Variables ===================================================
public:
typedef tlm::tlm_generic_payload *gp_ptr; ///< generic payload pointer
tlm::tlm_target_socket<> m_memory_socket; ///< target socket
private:
const unsigned int m_ID; ///< target ID
sc_dt::uint64 m_memory_size; ///< memory size (bytes)
unsigned int m_memory_width; ///< word size (bytes)
const sc_core::sc_time m_accept_delay; ///< accept delay
const sc_core::sc_time m_read_response_delay; ///< read response delay
const sc_core::sc_time m_write_response_delay; ///< write response delays
unsigned long m_request_count; ///< used to calc synch transactions
bool m_nb_trans_fw_prev_warning;
bool m_begin_resp_method_prev_warning;
bool m_trans_dbg_prev_warning;
bool m_get_dm_ptr_prev_warning;
tlm_utils::peq_with_get<tlm::tlm_generic_payload>
m_response_PEQ; ///< response payload event queue
sc_core::sc_time m_peq_delay_time;
sc_core::sc_time m_delay_for_out_of_order;
memory m_target_memory;
sc_core::sc_event m_end_resp_rcvd_event;
};
#endif /* __AT_TARGET_OOO_2_PHASE_H__ */
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/include/initiator_top.h
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/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
//=====================================================================
/// @file initiator_top.h
//
/// @brief Initiator top module contains a traffic generator and an
/// example initiator module unique for the example
//
//=====================================================================
// Original Authors:
// Bill Bunton, ESLX
// Charles Wilson, ESLX
// Jack Donovan, ESLX
//=====================================================================
#ifndef __INITIATOR_TOP_H__
#define __INITIATOR_TOP_H__
#include "tlm.h" // TLM headers
#include "select_initiator.h" // AT initiator
#include "traffic_generator.h" // traffic generator
class initiator_top
: public sc_core::sc_module
, virtual public tlm::tlm_bw_transport_if<> // backward non-blocking interface
{
//Member Methods =====================================================
public:
//=====================================================================
/// @fn initiator_top::initiator_top
//
/// @brief initiator_top constructor
//
/// @details
/// Initiator top module contains a traffic generator and an example
/// unique initiator module
//
//=====================================================================
initiator_top
( sc_core::sc_module_name name ///< module name
, const unsigned int ID ///< initiator ID
, sc_dt::uint64 base_address_1 ///< first base address
, sc_dt::uint64 base_address_2 ///< second base address
, unsigned int active_txn_count ///< Max number of active transactions
);
private:
/// Not Implemented for this example but required by the initiator socket
void
invalidate_direct_mem_ptr
( sc_dt::uint64 start_range
, sc_dt::uint64 end_range
);
/// Not Implemented for this example but require by the initiator socket
tlm::tlm_sync_enum
nb_transport_bw
( tlm::tlm_generic_payload &payload
, tlm::tlm_phase &phase
, sc_core::sc_time &delta
);
//Member Variables/Objects ===========================================
public:
tlm::tlm_initiator_socket<> initiator_socket; ///< processor socket
private:
typedef tlm::tlm_generic_payload *gp_ptr; ///< Generic Payload pointer
sc_core::sc_fifo <gp_ptr> m_request_fifo; ///< request SC FIFO
sc_core::sc_fifo <gp_ptr> m_response_fifo; ///< response SC FIFO
const unsigned int m_ID; ///< initiator ID
select_initiator m_initiator; ///< TLM initiator instance
traffic_generator m_traffic_gen; ///< traffic generator instance
};
#endif /* __INITIATOR_TOP_H__ */
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/results/expected.log
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source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/src/at_ooo.cpp
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/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
//=====================================================================
/// @file example_main.cpp
///
/// @brief Example main instantiates the example system top and call
/// sc_start()
///
//=====================================================================
// Original Authors:
// Bill Bunton, ESLX
// Anna Keist, ESLX
// Charles Wilson, ESLX
// Jack Donovan, ESLX
//=====================================================================
// define REPORT_DEFINE_GLOBALS in one location only
#define REPORT_DEFINE_GLOBALS
#include "reporting.h" // reporting utilities
#include "at_ooo_top.h" // top module
#include "tlm.h" // TLM header
//=====================================================================
/// @fn sc_main
//
/// @brief SystemC entry point
//
/// @details
/// This is the SystemC entry point for the example system. The argc and argv
/// parameters are not used. Simulation runtime is not specified when
/// “sc_start()” is called, the example’s traffic generator will run to
/// completion, ending the simulation.
///
//=====================================================================
int // return status
sc_main // SystemC entry point
(int argc // argument count
,char *argv[] // argument vector
)
{
REPORT_ENABLE_ALL_REPORTING ();
example_system_top top("top"); // instantiate a exmaple top module
sc_core::sc_start(); // start the simulation
return 0; // return okay status
}
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/src/at_ooo_top.cpp
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/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*=============================================================================
@file example_system_top.cpp
@brief This class instantiates components that compose a TLM2 example system
that demonstrates Out Of Order transaction processing
=============================================================================*/
/*****************************************************************************
Original Authors:
Bill Bunton, ESLX
Anna Keist, ESLX
*****************************************************************************/
#include "at_ooo_top.h" // example system top header
#include "at_target_2_phase.h" // memory target
#include "at_target_ooo_2_phase.h" // memory target
#include "initiator_top.h" // initiator
#include "tlm.h" // TLM header
/*=============================================================================
@fn example_system_top::example_system_top
@brief example_system_top constructor
@details
This class instantiates the example system components and call
the modules bind methods to logically connect the model components.
@param name module name
@retval void
=============================================================================*/
example_system_top::example_system_top ///< constructor
( sc_core::sc_module_name name ///< module name
)
: sc_core::sc_module ///< SC base
( name ///< module name
)
, m_bus ///< bus
( "m_bus" ///< module name
)
, m_at_target_2_phase_1 ///< at_test_target
( "m_at_target_2_phase_1" ///< module name
, 201
, "memory_socket_1" ///< socket name
, 4*1024 ///< memory size (bytes)
, 4 ///< memory width (bytes)
, sc_core::sc_time(10, sc_core::SC_NS) ///< accept delay
, sc_core::sc_time(50, sc_core::SC_NS) ///< read response delay
, sc_core::sc_time(30, sc_core::SC_NS) ///< write response delay
)
, m_at_target_ooo_2_phase_1 ///< at_test_target
( "m_at_target_ooo_2_phase_1" ///< module name
, 202
, "memory_socket_1" ///< socket name
, 4*1024 ///< memory size (bytes)
, 4 ///< memory width (bytes)
// force additional out of order execution by making on
// target longer than the other
, sc_core::sc_time(20, sc_core::SC_NS) ///< accept delay
, sc_core::sc_time(100, sc_core::SC_NS) ///< read response delay
, sc_core::sc_time(60, sc_core::SC_NS) ///< write response delay
)
, m_initiator_1 ///< initiator 1
( "m_initiator_1" ///< module name
, 101 ///< initiator ID
, 0x0000000000000100 ///< fitst base address
, 0x0000000010000100 ///< second base address
, 2 // active transactions
)
, m_initiator_2 ///< initiator 2
( "m_initiator_2" ///< module name
, 102 ///< initiator ID
, 0x0000000000000200 ///< fitst base address
, 0x0000000010000200 ///< second base address
, 2 // active transactions
)
{
// bind TLM2 initiator to TLM2 target
m_initiator_1.initiator_socket(m_bus.target_socket[0]);
m_initiator_2.initiator_socket(m_bus.target_socket[1]);
m_bus.initiator_socket[0](m_at_target_2_phase_1.m_memory_socket);
m_bus.initiator_socket[1](m_at_target_ooo_2_phase_1.m_memory_socket);
}
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/src/at_target_ooo_2_phase.cpp
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/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
//=====================================================================
/// @file at_target_ooo_2_phase.cpp
//
/// @brief Implements single phase AT target that has been modified to perform
/// Out Of Order transactions
//
//=====================================================================
// Original Authors:
// Charles Wilson, ESLX
// Bill Bunton, ESLX
// Jack Donovan, ESLX
//=====================================================================
#include "at_target_ooo_2_phase.h" // our header
#include "reporting.h" // reporting macros
using namespace std;
static const char *filename = "at_target_ooo_2_phase.cpp"; ///< filename for reporting
SC_HAS_PROCESS(at_target_ooo_2_phase);
///Constructor
at_target_ooo_2_phase::at_target_ooo_2_phase
( sc_core::sc_module_name module_name // module name
, const unsigned int ID // target ID
, const char *memory_socket // socket name
, sc_dt::uint64 memory_size // memory size (bytes)
, unsigned int memory_width // memory width (bytes)
, const sc_core::sc_time accept_delay // accept delay (SC_TIME)
, const sc_core::sc_time read_response_delay // read response delay (SC_TIME)
, const sc_core::sc_time write_response_delay // write response delay (SC_TIME)
)
: sc_module (module_name) /// init module name
, m_memory_socket (memory_socket) /// init socket name
, m_ID (ID) /// init target ID
, m_memory_size (memory_size) /// init memory size (bytes)
, m_memory_width (memory_width) /// init memory width (bytes)
, m_accept_delay (accept_delay) /// init accept delay
, m_read_response_delay (read_response_delay) /// init read response delay
, m_write_response_delay (write_response_delay) /// init write response delay
, m_request_count (1) /// init request count
, m_nb_trans_fw_prev_warning(false)
, m_begin_resp_method_prev_warning(false)
, m_trans_dbg_prev_warning(false)
, m_get_dm_ptr_prev_warning(false)
, m_response_PEQ ("response_PEQ")
, m_peq_delay_time (0 , sc_core::SC_NS)
, m_delay_for_out_of_order(700, sc_core::SC_NS)
, m_target_memory /// init target's memory
( m_ID // initiator ID for messaging
, m_read_response_delay // delay for reads
, m_write_response_delay // delay for writes
, m_memory_size // memory size (bytes)
, m_memory_width // memory width (bytes)
)
{
/// Bind the socket's export to the interface
m_memory_socket(*this);
/// Register begin_reponse as an SC_METHOD
/// Used to implement force synchronization multiple timing points
SC_METHOD(begin_response_method);
sensitive << m_response_PEQ.get_event();
dont_initialize();
}
//==============================================================================
// b_transport implementation calls from initiators
//
//=============================================================================
void
at_target_ooo_2_phase::b_transport
( tlm::tlm_generic_payload &payload // ref to Generic Payload
, sc_core::sc_time &delay_time // delay time
)
{
std::ostringstream msg; // log message
msg.str("");
msg << "Target: " << m_ID
<< " b_transport(GP, "
<< delay_time << ")";
REPORT_INFO(filename, __FUNCTION__, msg.str());
m_target_memory.operation(payload,delay_time);
// delay_time = delay_time + m_end_rsp_delay;
msg << "Target: " << m_ID
<< "(GP, "
<< delay_time << ")";
REPORT_INFO(filename, __FUNCTION__, msg.str());
return;
}
//=============================================================================
// nb_transport_fw implementation calls from initiators
//
//=============================================================================
tlm::tlm_sync_enum // synchronization state
at_target_ooo_2_phase::nb_transport_fw // non-blocking transport call through Bus
( tlm::tlm_generic_payload &gp // generic payoad pointer
, tlm::tlm_phase &phase // transaction phase
, sc_core::sc_time &delay_time) // time it should take for transport
{
std::ostringstream msg; // log message
msg.str("");
msg << "Target: " << m_ID
<< " nb_transport_fw (GP, "
<< report::print(phase) << ", "
<< delay_time << ")";
tlm::tlm_sync_enum return_status = tlm::TLM_COMPLETED;
//-----------------------------------------------------------------------------
// decode phase argument
//-----------------------------------------------------------------------------
switch (phase)
{
//=============================================================================
case tlm::BEGIN_REQ:
{
//-----------------------------------------------------------------------------
// Force synchronization multiple timing points by returning TLM_ACCEPTED
// use a payload event queue to schedule BEGIN_RESP timing point
//-----------------------------------------------------------------------------
m_target_memory.get_delay(gp, delay_time); // get memory operation delay
delay_time += m_accept_delay;
m_peq_delay_time = delay_time;
bool ooo_flag(false);
// every other request forces a possible out of order transaction
if(m_request_count++ % 2)
{ m_peq_delay_time += m_delay_for_out_of_order;
ooo_flag = true;
}
else { ooo_flag = false; }
m_response_PEQ.notify(gp, m_peq_delay_time); // put transaction in the PEQ
delay_time = m_accept_delay;
phase = tlm::END_REQ; // advance txn state to end request
return_status = tlm::TLM_UPDATED; // force synchronization
msg << endl << " "
<< "Target: " << m_ID;
if(ooo_flag == true)
{ msg << " out of order"; }
msg << " transaction moved to response PEQ " << endl;
msg << " Target: " << dec << m_ID
<< " with Addr: 0x" << setw(8) << setfill('0') << hex << gp.get_address() << dec
<< " and a delay of " << m_peq_delay_time;
msg << endl << " "
<< "Target: " << m_ID
<< " " << report::print(return_status) << " (GP, "
<< report::print(phase) << ", "
<< delay_time << ")" ;
REPORT_INFO(filename, __FUNCTION__, msg.str());
break;
} // end BEGIN_REQ
//=============================================================================
case tlm::END_RESP:
{
m_end_resp_rcvd_event.notify (sc_core::SC_ZERO_TIME);
return_status = tlm::TLM_COMPLETED; // indicate end of transaction
msg << endl << " "
<< "Target: " << m_ID
<< " " << report::print(return_status) << " (GP, "
<< report::print(phase) << ", "
<< delay_time << ")" ;
REPORT_INFO(filename, __FUNCTION__, msg.str());
break;
}
//=============================================================================
case tlm::END_REQ:
case tlm::BEGIN_RESP:
{
msg << "Target: " << m_ID
<< " Illegal phase received by target -- END_REQ or BEGIN_RESP";
REPORT_FATAL(filename, __FUNCTION__, msg.str());
return_status = tlm::TLM_ACCEPTED;
break;
}
//=============================================================================
default:
{
return_status = tlm::TLM_ACCEPTED;
if(!m_nb_trans_fw_prev_warning)
{
msg << "Target: " << m_ID
<< " default phase encountered";
REPORT_WARNING(filename, __FUNCTION__, msg.str());
}
else m_nb_trans_fw_prev_warning = true;
break;
}
}
return return_status;
} //end nb_transport_fw
//=============================================================================
/// begin_response method function implementation
//
// This method is statically sensitive to m_response_PEQ.get_event
//
//=============================================================================
void at_target_ooo_2_phase::begin_response_method (void)
{
std::ostringstream msg; // log message
tlm::tlm_generic_payload *transaction_ptr; // generic payload pointer
msg.str("");
tlm::tlm_sync_enum status = tlm::TLM_COMPLETED;
//-----------------------------------------------------------------------------
// Process all transactions scheduled for current time a return value of NULL
// indicates that the PEQ is empty at this time
//-----------------------------------------------------------------------------
while ((transaction_ptr = m_response_PEQ.get_next_transaction()) != NULL)
{
msg.str("");
msg << "Target: " << m_ID
<< " Starting response method for Addr: 0X"
<< setw(8) << setfill('0') << hex << transaction_ptr->get_address()
<< endl << " ";
REPORT_INFO(filename, __FUNCTION__, msg.str());
sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
m_target_memory.operation(*transaction_ptr, delay); /// perform memory operation
tlm::tlm_phase phase = tlm::BEGIN_RESP;
delay = sc_core::SC_ZERO_TIME;
msg.str("");
msg << "Target: " << dec << m_ID
<< " nb_transport_bw (GP, BEGIN_RESP, SC_ZERO_TIME)"
<< endl << " ";
REPORT_INFO(filename, __FUNCTION__, msg.str());
//-----------------------------------------------------------------------------
// Call nb_transport_bw with phase BEGIN_RESP check the returned status
//-----------------------------------------------------------------------------
status = m_memory_socket->nb_transport_bw(*transaction_ptr, phase, delay);
msg.str("");
msg << "Target: " << dec << m_ID
<< " " << report::print(status) << " (GP, "
<< report::print(phase) << ", "
<< delay << ")";
REPORT_INFO(filename, __FUNCTION__, msg.str());
switch (status)
{
//=============================================================================
case tlm::TLM_COMPLETED:
{
next_trigger (delay); // add comments ???
return;
break;
}
//=============================================================================
case tlm::TLM_ACCEPTED:
{
next_trigger (m_end_resp_rcvd_event); // add comments ???
return;
break;
}
//=============================================================================
case tlm::TLM_UPDATED:
{
if(!m_begin_resp_method_prev_warning)
{
msg << "Target: " << m_ID
<< " TLM_UPDATED invalid response to BEGIN_RESP";
REPORT_WARNING(filename, __FUNCTION__, msg.str());
}
else m_begin_resp_method_prev_warning = true;
break;
}
//=============================================================================
default:
{
if(!m_begin_resp_method_prev_warning)
{
msg << "Target: " << m_ID
<< " undefined return status ";
REPORT_WARNING(filename, __FUNCTION__, msg.str());
}
else m_begin_resp_method_prev_warning = true;
break;
}
}// end switch
} // end while
next_trigger (m_response_PEQ.get_event());
} //end begin_response_queue_active
//==============================================================================
// Methods Required by Target Interface but not Implemented for this Example
// Not implemented for this example but required by interface
bool
at_target_ooo_2_phase::get_direct_mem_ptr
(tlm::tlm_generic_payload &payload, ///< address + extensions
tlm::tlm_dmi &data ///< dmi data
)
{
// THis is not a fatal, print first as warning
std::ostringstream msg;
msg.str("");
if(!m_get_dm_ptr_prev_warning)
{
msg << "Target: " << m_ID
<< " DMI not implemented for this example";
REPORT_WARNING(filename, __FUNCTION__, msg.str());
}
else m_get_dm_ptr_prev_warning = true;
return false;
}
// Not implemented for this example but required by interface
unsigned int // result
at_target_ooo_2_phase::transport_dbg
( tlm::tlm_generic_payload &payload ///< debug payload
)
{
std::ostringstream msg;
msg.str("");
if(!m_trans_dbg_prev_warning)
{
msg << "Target: " << m_ID
<< " DBG(debug) not implemented for this example";
REPORT_WARNING(filename, __FUNCTION__, msg.str());
}
else m_trans_dbg_prev_warning = true;
return false;
}
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/src/initiator_top.cpp
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/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
//=====================================================================
/// @file initiator_top.cpp
//
/// @brief Implements instantiation and interconnect of traffic_generator
/// and an initiator via sc_fifos for at_1_phase_example
//
//=====================================================================
// Original Authors:
// Bill Bunton, ESLX
// Charles Wilson, ESLX
// Anna Keist, ESLX
// Jack Donovan, ESLX
//=====================================================================
#include "initiator_top.h" // Top traffic generator & initiator
#include "reporting.h" // reporting macro helpers
static const char *filename = "initiator_top.cpp"; ///< filename for reporting
/// Constructor
initiator_top::initiator_top
( sc_core::sc_module_name name
, const unsigned int ID
, sc_dt::uint64 base_address_1
, sc_dt::uint64 base_address_2
, unsigned int active_txn_count
)
:sc_module (name) // module name for top
,initiator_socket ("at_initiator_socket") // TLM socket
,m_ID (ID) // initiator ID
,m_initiator // Init initiator
("m_initiator_1_phase"
,ID
,sc_core::sc_time(7, sc_core::SC_NS) // set initiator end rsp delay
)
,m_traffic_gen // Init traffic Generator
("m_traffic_gen"
,ID
,base_address_1 // first base address
,base_address_2 // second base address
,active_txn_count // Max active transactions
)
{
/// Bind ports to m_request_fifo between m_initiator and m_traffic_gen
m_traffic_gen.request_out_port (m_request_fifo);
m_initiator.request_in_port (m_request_fifo);
/// Bind ports to m_response_fifo between m_initiator and m_traffic_gen
m_initiator.response_out_port (m_response_fifo);
m_traffic_gen.response_in_port (m_response_fifo);
/// Bind initiator-socket to initiator-socket hierarchical connection
m_initiator.initiator_socket(initiator_socket);
}
//=====================================================================
/// @fn initiator_top::invalidate_direct_mem_ptr
///
/// @brief Unused mandatory virtual implementation
///
/// @details
/// No DMI is implemented in this example so unused
///
//=====================================================================
void
initiator_top::invalidate_direct_mem_ptr
( sc_dt::uint64 start_range
, sc_dt::uint64 end_range
)
{
std::ostringstream msg; // log message
msg.str ("");
msg << "Initiator: " << m_ID << " Not implemented";
REPORT_ERROR(filename, __FUNCTION__, msg.str());
} // end invalidate_direct_mem_ptr
//=====================================================================
/// @fn initiator_top::nb_transport_bw
//
/// @brief Unused mandatory virtual implementation
///
/// @details
/// Unused implementation from hierarchichal connectivity of
/// Initiator sockets.
///
//=====================================================================
tlm::tlm_sync_enum
initiator_top::nb_transport_bw
( tlm::tlm_generic_payload &payload
, tlm::tlm_phase &phase
, sc_core::sc_time &delta
)
{
std::ostringstream msg; // log message
msg.str ("");
msg << "Initiator: " << m_ID
<< " Not implemented, for hierachical connection of initiator socket";
REPORT_ERROR(filename, __FUNCTION__, msg.str());
return tlm::TLM_COMPLETED;
} // end nb_transport_bw
source/repositories-complete/systemc-exact/systemc/examples/tlm/at_ooo/test.am
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## ****************************************************************************
##
## Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
## more contributor license agreements. See the NOTICE file distributed
## with this work for additional information regarding copyright ownership.
## Accellera licenses this file to you under the Apache License, Version 2.0
## (the "License"); you may not use this file except in compliance with the
## License. You may obtain a copy of the License at
##
## http://www.apache.org/licenses/LICENSE-2.0
##
## Unless required by applicable law or agreed to in writing, software
## distributed under the License is distributed on an "AS IS" BASIS,
## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
## implied. See the License for the specific language governing
## permissions and limitations under the License.
##
## ****************************************************************************
##
## test.am --
## Included from a Makefile.am to provide example-specific information
##
## Original Author: Philipp A. Hartmann, OFFIS, 2013-05-20
##
## ****************************************************************************
##
## MODIFICATION LOG - modifiers, enter your name, affiliation, date and
## changes you are making here.
##
## Name, Affiliation, Date:
## Description of Modification:
##
## ***************************************************************************
## Generic example setup
## (should be kept in sync among all test.am files)
##
## Note: Recent Automake versions (>1.13) support relative placeholders for
## included files (%D%,%C%). To support older versions, use explicit
## names for now.
##
## Local values:
## %D%: at_ooo
## %C%: at_ooo
examples_TESTS += at_ooo/test
at_ooo_test_CPPFLAGS = \
-I$(srcdir)/at_ooo/include \
$(CPPFLAGS_TLMTESTS)
at_ooo_test_SOURCES = \
$(at_ooo_H_FILES) \
$(at_ooo_CXX_FILES)
examples_BUILD += \
$(at_ooo_BUILD)
examples_CLEAN += \
at_ooo/run.log \
at_ooo/expected_trimmed.log \
at_ooo/run_trimmed.log \
at_ooo/diff.log
examples_FILES += \
$(at_ooo_H_FILES) \
$(at_ooo_CXX_FILES) \
$(at_ooo_BUILD) \
$(at_ooo_EXTRA)
examples_DIRS += \
at_ooo/$(TLM_EXAMPLE_SUBDIRS)
## example-specific details
at_ooo_H_FILES = \
at_ooo/include/at_ooo_top.h \
at_ooo/include/at_target_ooo_2_phase.h \
at_ooo/include/initiator_top.h
at_ooo_CXX_FILES = \
at_ooo/src/at_ooo.cpp \
at_ooo/src/at_ooo_top.cpp \
at_ooo/src/at_target_ooo_2_phase.cpp \
at_ooo/src/initiator_top.cpp
at_ooo_BUILD = \
at_ooo/results/expected.log
at_ooo_EXTRA = \
at_ooo/CMakeLists.txt \
at_ooo/build-msvc/Makefile \
at_ooo/build-msvc/at_ooo.sln \
at_ooo/build-msvc/at_ooo.vcxproj \
at_ooo/build-unix/Makefile \
at_ooo/docs/at_ooo_example.pdf \
at_ooo/docs/at_ooo_example.ppt
#at_ooo_FILTER =
## Taf!
## :vim: ft=automake: